ETRI-Knowledge Sharing Plaform

Ge-On-Si Illumination Type High Responsivity Sige Hbt Type 1 Data Rate 3-Db Bandwidth Si Photodetector 50 GB Data Transmission 1550 Nm Bulk Silicon Phase Shifter Cost-Effective Down-Conversion Mixer Reduced Pressure Chemical Vapor Deposition P-I-N Photodetectors 5.8 Ghz Low Dark Current Sige Film Bit Error Rate(And BER) Optical Network Applications Waveguide Photodetector Performance Levels Photonic Devices Petri Net(PN) TO-CAN 1/F Noise High Sensitivity Optical Interconnect(OI) Threading Dislocations(TDs) 6 Ghz Fabrication Process Field-Effect Transistors(FETs) Optical Data Zno Thin Films Chemical Mechanical Polishing(CMP) Differential Drive Reset Current Sige Alloy Silicon Photonics Technology Experimental Result High Temperature Silicon Wafer Strained-Si Memory Device Silicon Substrate Structure-Related Sige Bicmos Technology Dual-Channel Extinction Ratio Optical Transmission P-Zno Silicon-Germanium(SiGe) Wide Range Spiral Inductor Bulk Cmos Ge Photodetectors Low-Cost 40 Gb/S 2.4 Ghz Zno Films Bottom Electrode Cmos Compatible Process Base Structure Cross-Sectional Imaging Concurrent Dual-Band Deposition Technique Dry Etching Electrical Properties(I-V curve) Fowler-Nordheim (F-N) Stress In-Situ Annealing Input Power Ict Convergence Key Parameters Memory Interface Negative Differential Resistance(NDR) Novel Method N-Type Transistors Oxidation Of Silicon Parasitic Capacitance Practical Implementation Prostate-Specific Antigen(PSA) Process Conditions Phase Change Material(PCM) Resonance Frequency Rf Isolation Reconfigurable Fet Switching Speed Semiconductor Technology Selective Epitaxial Growth(SEG) Time Effect Threading Dislocation Density P-N Junction Pattern Analysis Up-Conversion Mixer Annealing Temperature Au Nanoparticles(Au-NPs) Crystal Plane Current-Voltage Carrier Confinement Creative Technology Driver Circuit Data Center Electrical Resistivity Energy Efficiency Electronic Chips Electronic-Photonic Integration Epitaxial Lateral Overgrowth High-Quality Insulator Material III-V I/O Devices Low Concentration Low Power Leakage Mach-Zehnder (Mz) Modulator Medium Power Amplifier Novel Technique Noise Performance Non-Volatile Memory(NVM) Oxide Trap Density Operational Voltage Photonic Interconnects P-Doped Quality-Factor(Q-factor) Radio Link Rf-Magnetron Sputter Deposition Reverse Leakage Current Surface Immobilization Soi Process Structure Optimization Sige Epitaxial Growth Annealing Process Doped Poly-Si Electrical Contact Eye Diagram Etching Process Higher Frequency Hybrid Memory Cube Hole Concentration Insertion Loss Integration Scheme Network Communication Metal-Insulator Transition Nano-Device Oxidation Process Polished Si Silicon Photonic Integrated Circuits Soi Wafer Silicon Waveguide Situ Doping Signal-To-Noise Tensile Strain Thermal Variation Thermal Stability(TGA) Ultra-Thin Body(UTB) Ultra-High Vacuum Chemical Vapor Deposition Communication Applications 1310 Nm Buffer Layer Cut-Off Frequency Crystalline State Carrier Density External Quantum Efficiency Enhanced Performance Force Microscopy High Speed Network Heating Layers LOW POWER AND HIGH SPEED Model-Based Surface Potential Silicon-Based Thin Films Si Channel Surface Roughness Analysis X-Ray Diffraction Analysis Top-Down 65 Nm Si Wafer Nonreturn-To-Zero(NRZ) 100 Gb/S Building Block Coupled Waveguide Cmos Driver Current Consumption Complementary Metal-Oxide-Semiconductor(CMOS) Quantum Channel High Resistivity High Throughput(HTP) High Speed Communication Ion Implantation Light Sources Limiting Factors Monolithically Integrated New Method Operating Speed Optical Transceiver Photonic Transceiver Phase Transition Rf Performance Sound Performance Silicon Epitaxial Layer System-On-Chip(SoC) 7 Mm Transit Time Wire-Bonded Applied Bias Avalanche Photodetector Atomic Force Microscope(AFM) Amorphous Sio 2 Compact Model Conversion Gain Chalcogenide Alloys Doped Silicon Fermi Level Highly Doped Hybrid Electronics Inp Hbt Maximum Oscillation Frequency Optical Communications On-Board Equipment Power Amplifiers(PAs) Potential Applications Performance Tradeoffs Process Technology Photonic Transmitter Photonic Integrated Circuits (Pics) P-Type Zno P-N Heterojunction Surface Analysis Silicon Electronics Density Change Single Channel Single Wafer Si-Cap Sige Source Travelling Wave Build-Up Time Data Communication Diffraction Pattern Front-End Circuit High-Performance Computer(HPC) Highly Crystalline Key Role Low Voltage Low Phase Noise Optimized Process Off-Chip Photonic Circuits Potential Barrier Receiver Front-End 850 Nm Window Size 3.5 Ghz 2.3 Ghz And Logic Gates Avalanche Breakdown Voltage Cmos Receiver Joule Heating Cmos Front-End Control Device Cycling Endurance Data Computing Fowler-Nordheim Stress Fully Integrated Germanium Photodetector High-Resolution X-Ray Diffraction Interface Circuit Local Area Layer Growth Low Noise Localized Oxidation Modulation Efficiency Misfit Dislocation Minimum Noise Figure Material Characteristics Module Performance On-Chip Measurement Optical Propagation Loss Optical Power Optical Alignment Polycrystalline Silicon(poly-Si) Power Demand Pulse Width Rf Transmitter Relaxed Sige Single-Chip Small-Sized Si Substrate Specific Binding Silicon-On-Insulator (Soi) Technology Supply Voltage Second Metal Sige Bicmos Process Sige Virtual Substrates Strain Relief Sige Device Wavelength Range