ETRI-Knowledge Sharing Plaform

Wireless Communication Control Method Efficient Architecture Baseband Signal Baseband Modem High Speed Direct-Sequence Code-Division Multiple-Access(DS-CDMA) High-Throughput Architecture Data Transfer Energy Loss Multimedia Applications Network Interface Array Processor Cyclic Shift Hdl Coder High-Dimensional Galois/Counter Mode Single Instruction Multiple Data(SIMD) Vector Compression Vector Similarity Long Term Evolution(LTE) Motion Compensation(MoCo) Cost-Effective Base Station(BS) Computation Complexity Sequence Generator Wider Bandwidth Network Architecture Hardware Description Language(HDL) Inverse Quantization Signal Generation Verilog Hdl Similarity Measure Narrowband Internet Of Things(NB-IoT) On-Chip Network Parallel Processor Physical Uplink Control Channel Code Reuse Hierarchical Structure Singular Value Decomposition(SVD) Support Vectormachine(SVM) Reverse Channel Transfer Line Simd Processors Soc Architecture Performance Evaluation Phase Compensation Communication Network Communication Link Detection Method 60 Ghz Reconfigurable Processor Flow Control Wideband Operation Low Latency Multimedia Data Processing Modular Architecture Area-Efficient Blocking Effect Design Criteria Image Stitching User Equipment(UE) Small Size Multiple Component Carriers New Object Detection Inverse Transform Center Frequency Compression Method Computational Complexity Hardware Implementation Radial Basis Function Multiple Users Fpga-In-The-Loop