ETRI-Knowledge Sharing Plaform

Neural Networks Data Reuse Neural Processor Acceleration Performance Graphic Processing Unit(GPU) High Performance Artificial Intelligence Applications Deep Neural Network(DNN) Superior Performance 28 Nm Network Accelerator Power Efficiency Development Environment Development Time High Degree Intellectual Property(IP) Memory Architecture Safety Standard Software Implementation Functional Safety Fpga Board Flexible Memory Operating Scheme Programmable Control Single-Chip Voice Recognition Silicon Area Systolic Array Efficient Architecture High Speed High Frequency(HF) Memory-Efficient Power Management Low-Power Object Recognition On-Chip Memory Power Consumption Power Saving User-Friendly Electronic Control Unit(ECU) Execution Time Floating-Point Data Image Recognition Mesh Structure Max-Pooling Processor Architecture Coupled With Deep Learning(DL) Vehicle Safety State-Of-The-Art General-Purpose Graphics Processing Unit(GPGPU) In-Memory In-Vehicle Neural Nets Optimization Algorithm Power Limit Power Model Road Vehicle Automated Optimization Dynamic Voltage And Frequency Scaling Dynamic Frequency Scaling Small Footprint Electronic System Higher Performance Large Memory Memory Structure Soc System Quad-Core Design Verification Area Constraints Safety Requirements Iso 26262 Mobile Application(APP) Matrix Multiplication Neural Network Applications Operating Frequency Run Time Real-Time Execution Control Scheme Estimated Performance Multi-Dimensional Neural Processing Power Behavior Process Technology Autonomous Driving Vehicle Adaptive Power Voltage Scaling Wide Range