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학술지 Electrical Characteristics of Triple-Gate RSO Power MOSFET (TGRMOS) with Various Gate Configurations and Bias Conditions
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저자
나경일, 원종일, 구진근, 김상기, 김종대, 양일석, 이진호
발행일
201306
출처
ETRI Journal, v.35 no.3, pp.425-430
ISSN
1225-6463
출판사
한국전자통신연구원 (ETRI)
DOI
https://dx.doi.org/10.4218/etrij.13.0112.0246
협약과제
12MB2100, BLDC 모터용 고전압/대전류 파워모듈 및 ESD 기술개발, 양일석
초록
In this paper, we propose a triple-gate trench power MOSFET (TGRMOS) that is made through a modified RESURF stepped oxide (RSO) process, that is, the nitride-RSO process. The electrical characteristics of TGRMOSs, such as the blocking voltage (BVDS) and onstate current (ID,MAX), are strongly dependent on the gate configuration and its bias condition. In the nitride-RSO process, the thick single insulation layer (SiO2) of a conventional RSO power MOSFET is changed to a multilayered insulator (SiO 2/SiNx/TEOS). The inserted SiNx layer can create the selective etching of the TEOS layer between the gate oxide and poly-Si layers. After additional oxidation and the poly-Si filling processes, the gates are automatically separated into three parts. Moreover, to confirm the variation in the electrical properties of TGRMOSs, such as BVDS and ID,MAX, simulation studies are performed on the function of the gate configurations and their bias conditions. BVDS and ID,MAX are controlled from 87 V to 152 V and from 0.14 mA to 0.24 mA at a 15-V gate voltage. This ID,MAX variation indicates the specific on-resistance modulation. © 2013 ETRI.
키워드
Multigate, Power MOSFET, RSO process, Superjunction (SJ), TDMOS
KSP 제안 키워드
Blocking voltage, Gate oxide, Insulation layer, Polycrystalline silicon(poly-Si), Resistance modulation, SiO 2, Simulation study, Triple-gate, electrical characteristics, electrical properties(I-V curve), gate voltage