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학술지 A Novel Process for Fabricating a High Density Trench MOSFETs for DC-DC Converters
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저자
김종대, 노태문, 김상기, 박일용, 양일석, 이대우, 구진근, 조경익, 강영일
발행일
200210
출처
ETRI Journal, v.24 no.5, pp.333-340
ISSN
1225-6463
출판사
한국전자통신연구원 (ETRI)
DOI
https://dx.doi.org/10.4218/etrij.02.0102.0501
협약과제
01MM1700, 휴대단말기용 DC-DC 컨버터 ASIC칩 개발, 김종대
초록
We propose a new process technique for fabricating very high-density trench MOSFETs using 3 mask layers with oxide spacers and a self-aligned technique. This technique reduces the device size in trench width, source, and p-body region with a resulting increase in cell density and current driving capability as well as cost-effective production capability. We were able to obtain a higher breakdown voltage with uniform oxide grown along the trench surface. The channel density of the trench DMOSFET with a cell pitch of 2.3-2.4 μm was 100 Mcell/in2 and a specific on-resistance of 0.41 m廓cm2 was obtained under a blocking voltage of 43 V.
KSP 제안 키워드
3 V, Blocking voltage, Breakdown voltage(BDV), Cell density, Channel Density, DC-DC Converters, Device size, Effective production, High-density, Novel process, Process technique