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학술지 Hyperelliptic Curve Crypto-Coprocessor over Affine and Projective Coordinates
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저자
김호원, Thomas Wollinger, 최두호, 한동국, 이문규
발행일
200806
출처
ETRI Journal, v.30 no.3, pp.365-376
ISSN
1225-6463
출판사
한국전자통신연구원 (ETRI)
DOI
https://dx.doi.org/10.4218/etrij.08.0107.0022
협약과제
08MS2200, 안전한 RFID/USN을 위한 정보보호 기술 개발, 정교일
초록
This paper presents the design and implementation of a hyperelliptic curve cryptography (HECC) coprocessor over affine and projective coordinates, along with measurements of its performance, hardware complexity, and power consumption. We applied several design techniques, including parallelism, pipelining, and loop unrolling, in designing field arithmetic units, group operation units, and scalar multiplication units to improve the performance and power consumption. Our affine and projective coordinate-based HECC processors execute in 0.436 ms and 0.531 ms, respectively, based on the underlying field GF(289). These results are about five times faster than those for previous hardware implementations and at least 13 times better in terms of area-time products. Further results suggest that neither case is superior to the other when considering the hardware complexity and performance. The characteristics of our proposed HECC coprocessor show that it is applicable to high-speed network applications as well as resource-constrained environments, such as PDAs, smart cards, and so on.
KSP 제안 키워드
Design techniques, Hardware Implementation, Hardware complexity, High speed network, Hyperelliptic curve cryptography, Loop unrolling, Network applications, Power Consumption, Projective coordinates, Resource-Constrained Environments, Scalar multiplication