Subject

Subjects : decoder architecture

  • Articles (9)
  • Patents (0)
  • R&D Reports (0)
논문 검색결과
Type Year Title Cited Download
Journal 2024 H2HSR: Hologram-to-Hologram Super-Resolution with Deep Neural Network   노유찬  IEEE Access, v.12, pp.90900-90914 2 원문
Conference 2022 Implementation of Ultra-Fast Polar Decoders   Hossein Rezaei  International Conference on Communications (ICC) 2022, pp.235-241 11 원문
Journal 2020 Regularising Neural Networks for Future Trajectory Prediction via Inverse Reinforcement learning Framework   Dooseop Choi  IET Computer Vision, v.14, no.5, pp.192-200 17 원문
Conference 2019 Real-time Multi-process Tracing Decoder Architecture   Kim Youngsoo  Workshop on Systems and Network Telemetry and Analytics (SNTA) 2019, pp.49-52 0 원문
Conference 2012 A Low Complexity Parallel Architecture of Turbo Decoder Based on QPP Interleaver for 3GPP-LTE/LTE-A   Chae Suchang  IP-Embedded System Conference & Exhibition (IP-SOC) 2012, pp.1-5
Conference 2011 Efficient Multiplierless Architecture for Frame Synchronization in DVB-S2 Standard   Emmanuel Boutillon  Workshop on Signal Processing Systems (SIPS) 2011, pp.163-167 7 원문
Conference 2011 An LDPC decoder architecture for multi-rate QC-LDPC codes   Choi Sung Woo  International Midwest Symposium on Circuits and Systems (MWSCAS) 2011, pp.1-4 2 원문
Conference 2006 RS Decoder Architecture for UWB   Choi Sung Woo  International Conference on Advanced Communication Technology (ICACT) 2006, pp.805-808 5
Conference 2004 Channel decoder architecture of OFDM based DMB system   Koo Bon Tae  International Symposium on Circuits and Systems (ISCAS) 2004, pp.73-76 원문
특허 검색결과
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연구보고서 검색결과
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