Subjects : power-delay product
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Journal | 2017 | Wire Optimization and Delay Reduction for High-Performance on-Chip Interconnection in GALS Systems Oh Myeong-Hoon ETRI Journal, v.39, no.4, pp.582-591 | 2 | 원문 |
| Journal | 2011 | Asynchronous 2-Phase Protocol Based on Ternary Encoding for On-Chip Interconnect Oh Myeong-Hoon ETRI Journal, v.33, no.5, pp.822-825 | 4 | 원문 |
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| Type | Year | Research Project | Primary Investigator | Download |
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