Subject

Subjects : Multilevel interconnection

  • Articles (2)
  • Patents (0)
  • R&D Reports (0)
논문 검색결과
Type Year Title Cited Download
Journal 1996 Planarised Interconnection Technology using a New Pillar Formation Method with Multi-Stacked Metal Structure   Min Park  Electronics Letters, v.32, no.18, pp.1731-1732 4 원문
Conference 1996 Multilevel Interconnection Technology using New Pillar Formation Method and CMP Planarization   Min Park  International Chemical-Mechanical Polish for VLSI/ULSI Multilevel Interconnection Conference (CMP-MIC) 1996, pp.291-298
특허 검색결과
Status Year Patent Name Country Family Pat. KIPRIS
No search results.
연구보고서 검색결과
Type Year Research Project Primary Investigator Download
No search results.