Subjects : Layout simulation
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Journal | 2013 | Architectural Design Issues in a Clockless 32 Bit Processor Using an Asynchronous HDL Oh Myeong-Hoon ETRI Journal, v.35, no.3, pp.480-490 | 4 | 원문 |
| Conference | 2011 | Design of Clockless 32-bit Processor Architecture Using an Asynchronous HDL Kim Young Woo 대한전자공학회 종합 학술 대회 (하계) 2011, pp.1638-1641 |
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