Subjects : 3D integrated
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Conference | 2024 | A Comparative Study of Au Stud and Cu Pillar in Flip-Chip bonding for 2.5D/3D Integrated Terabit Optical Chiplet Lee Jyung Chan Optics and Photonics Congress 2024, pp.1-1 | ||
| Conference | 2009 | High-Quality LTCC Solenoid Inductor Using Air Cavity on Silicon Wafer for 3D Integrated Circuit Bae Hyun-Cheol International Conference and Exhibition on Device Packaging (IMAPS) 2009, pp.1-1 |
| Status | Year | Patent Name | Country | Family Pat. | KIPRIS |
|---|---|---|---|---|---|
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| Type | Year | Research Project | Primary Investigator | Download |
|---|---|---|---|---|
| Final Report | 2023 | Development of Super Low Power Consumption Monolithic 3D Integrated Logic Circuit and Architecture with Low Temperature Metal Oxide Semiconductors | Cho Sung Haeng | |
| Annual Report | 2021 | Development of Super Low Power Consumption Monolithic 3D Integrated Logic Circuit and Architecture with Low Temperature Metal Oxide Semiconductors | Cho Sung Haeng | |
| Annual Report | 2021 | Development of Super Low Power Consumption Monolithic 3D Integrated Logic Circuit and Architecture with Low Temperature Metal Oxide Semiconductors | Cho Sung Haeng |