Subjects : Processor array
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Journal | 2001 | A 7.1-GB/s low-power rendering engine in 2-D array-embedded memory logic CMOS for portable multimedia system 박용하 IEEE Journal of Solid-State Circuits, v.36, no.6, pp.944-955 | 18 | 원문 |
| Status | Year | Patent Name | Country | Family Pat. | KIPRIS |
|---|---|---|---|---|---|
| Registered | 2012 | Signal amplifying apparatus, wireless transmitting apparatus, and signal amplifying method | UNITED STATES |
| Type | Year | Research Project | Primary Investigator | Download |
|---|---|---|---|---|
| No search results. | ||||