Subject

Subjects : BCH codes

  • Articles (5)
  • Patents (0)
  • R&D Reports (0)
논문 검색결과
Type Year Title Cited Download
Conference 2021 FPGA-Based Ordered Statistic Decoding Architecture for B5G/6G URLLC IIOT Networks   김창현  Asian Solid-State Circuits Conference (A-SSCC) 2021, pp.1-3 7 원문
Conference 2019 Improvement of Ordered Statistics Decoding for Low-rate BCH Codes   Ok-Sun Park  International Conference on Information and Communication Technology Convergence (ICTC) 2019, pp.837-839 6 원문
Journal 2013 Robust Video Watermarking Based on Temporal Modulation with Error Correcting Code   Lee Sang-Woo  International Journal of Security and Its Applications, v.7, no.3, pp.367-376 1
Conference 2012 Rate-Compatible Turbo Product Codes with Non-Symmetry Block Codes for Satellite Return Link Transmission Technology   Lee In Ki  International Conference on Information and Communication Technology Convergence (ICTC) 2012, pp.415-419 3 원문
Conference 2009 Two-Parallel Concatenated BCH Super-FEC Architecture for 100-GB/S Optical Communications   윤상호  Workshop on Signal Processing Systems (SIPS) 2009, pp.36-39 4 원문
특허 검색결과
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연구보고서 검색결과
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