상세정보
등록 반도체 패키지의 제조 방법 및 이에 의해 제조된 반도체 패키지
- 출원번호
- 12565171 (2009.09.23)
- 공개번호
- 20100320596 (2010.12.23)
- 등록번호
- 8030200 (2011.10.04)
- 출원국
- 미국
- 협약과제
- 09MB3700, 웨이퍼레벨 3차원 IC 설계 및 집적기술, 최광성
- 초록
- A method for fabricating a semiconductor package, includes the steps of forming a first terminal at a first substrate; mixing a polymer resin and solder particles to provide a mixture; covering at least one of an upper surface and side surfaces of the first terminal with the mixture; and heating the first substrate at a temperature higher than a melting point of the solder particles of the mixture to form a solder layer that covers the at least one of an upper surface and a side surface of the first terminal. The solder particles flow or diffuse toward the terminal in the heated polymer resin to adhere to at least some of the exposed surfaces of the terminal thereby forming the solder layer. The solder layer improves the adhesive strength between the terminals of the semiconductor chip and the substrate in the subsequent flip chip bonding process.
- KSP 제안 키워드
- Adhesive strength(68.35.G), Bonding process, Exposed surface, Flip-chip bonding, Particles flow, Polymer resin, Semiconductor chip, Semiconductor package, chip bonding, flip chip, melting point