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Registered 수직 필러를 포함하는 게이트 올 어라운드 전계 효과 트랜지스터 및 그 제조 방법

Inventors
조성행, 조병진, 김성근
Application No.
2025-0030495 (2025.03.10)
Registration No.
3003556 (2026.08.06)
Country
KOREA
Project Code
23IC2300, Ultra low power, high density, and high bandwidth DRAM based on monolithic 3D integration of oxide semiconductor thin-film transistor, Cho Sung Haeng
KSP Keywords
Fabrication method, Field Effect Transistor(FET), Gate-all-around, Vertical Pillar, field effect