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Journal
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2016 |
One-Bit to Four-Bit Dual Conversion for Security Enhancement against Power Analysis
Lee Seung Kwang IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, v.E99.A, no.10, pp.1833-1842 |
1 |
원문
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Conference
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2016 |
Switchable Dual-Rail Representation for Power-Analysis-Resistant Implementations of Block Ciphers
Lee Seung Kwang International Conference on Electric Vehicle, Smart Grid and Information Technology (ICESI) 2016, pp.313-317 |
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Conference
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2011 |
Design of Asynchronous 2-Phase Ternary Encoding Protocol Using Multiple-Valued Logic
Oh Myeong-Hoon International SoC Design Conference (ISOCC) 2011, pp.416-419 |
0 |
원문
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Journal
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2011 |
Asynchronous 2-Phase Protocol Based on Ternary Encoding for On-Chip Interconnect
Oh Myeong-Hoon ETRI Journal, v.33, no.5, pp.822-825 |
4 |
원문
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Journal
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2008 |
Low Static Powered Asynchronous Data Transfer for GALS System
Oh Myeong-Hoon IEICE Transactions on Information and Systems, v.E91-D, no.4, pp.1189-1192 |
0 |
원문
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Journal
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2006 |
Design of QDI Model Based Encoder/Decoder Circuits for Low Delay-Power Product Data Transfers in GALS Systems
Oh Myeong-Hoon 전자공학회논문지 SD, v.34, no.1, pp.27-37 |
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