Subjects : Gating technique
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Conference | 2009 | Energy-Aware 32bit Parallel Processing Unit with Multi Operation Modes and 2 Step Data Gating Technique for Multimedia Processor Yang Yil Suk International Conference on Computer Design (CDES) 2009, pp.80-84 | ||
| Conference | 2008 | Design of High Energy Efficiency 32bit Processing Unit Using Instruction-Levels Data Gating and Dynamic Voltage Scaling techniques Yang Yil Suk International SoC Design Conference (ISOCC) 2008, pp.II-69-II-72 | 0 | 원문 |
| Conference | 2006 | 32Bit SIMSD Path Architecture For High Energy Efficiency Using Single/Parallel Mode Bit and 2 Step Gating Technique Yang Yil Suk 한국반도체 학술 대회 (KCS) 2006, pp.1-2 |
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