Subjects : Power processor
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Journal | 2024 | Day–Night architecture: Development of an ultra-low power RISC-V processor for wearable anomaly detection 최은진 Journal of Systems Architecture, v.152, pp.1-11 | 10 | 원문 |
| Journal | 2024 | Day–Night architecture: Development of an ultra-low power RISC-V processor for wearable anomaly detection 이경원 Journal of Systems Architecture, v.152, pp.1-11 | 10 | 원문 |
| Journal | 2024 | Day–Night architecture: Development of an ultra-low power RISC-V processor for wearable anomaly detection 박진아 Journal of Systems Architecture, v.152, pp.1-11 | 10 | 원문 |
| Conference | 2023 | Developing an Ultra-low Power RISC-V Processor for Anomaly Detection 박진아 Design, Automation & Test in Europe Conference (DATE) 2023, pp.1-2 | 4 | 원문 |
| Conference | 2008 | A 100MHz ASIP (application specific instruction processor) for CAVLC of H.264/AVC Decoder Lee Jun Young International Symposium on Circuits and Systems (ISCAS) 2008, pp.3462-3465 | 3 | 원문 |
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