Subjects : Delay-insensitive
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Journal | 2017 | Design of a Clockless MSP430 Core using Mixed Asynchronous Design Flow Zi Ho Shin IEICE Electronics Express, v.14, no.8, pp.1-12 | 4 | 원문 |
| Conference | 2011 | Design of Asynchronous 2-Phase Ternary Encoding Protocol Using Multiple-Valued Logic Oh Myeong-Hoon International SoC Design Conference (ISOCC) 2011, pp.416-419 | 0 | 원문 |
| Journal | 2006 | Design of QDI Model Based Encoder/Decoder Circuits for Low Delay-Power Product Data Transfers in GALS Systems Oh Myeong-Hoon 전자공학회논문지 SD, v.34, no.1, pp.27-37 | ||
| Conference | 2005 | Design of Low Powered Delay Insensitive Data Transfers Based on Current-Mode Multiple Valued Logic Oh Myeong-Hoon 대한전자공학회 종합 학술 대회 (추계) 2005, pp.723-726 |
| Status | Year | Patent Name | Country | Family Pat. | KIPRIS |
|---|---|---|---|---|---|
| Registered | 2009 | DATA TRANSMITTING DEVICE, DATA RECEIVING DEVICE, DATA TRANSMITTING SYSTEM, AND DATA TRANSMITTING METHOD | UNITED STATES |
| Type | Year | Research Project | Primary Investigator | Download |
|---|---|---|---|---|
| No search results. | ||||