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Conference
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2015 |
Protocol for a Simplified Processor-Memory Interface Using High-Speed Serial Link
Kwon Hyuk Je International Conference on Cloud Computing (CloudComp) 2015 (LNICST 167), v.167, pp.301-310 |
0 |
원문
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Conference
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2015 |
Feasibility Test of Protocol Engines for a New Video System in Packet Communication
Kwon Hyuk Je International Conference on Computer Research and Development (ICCRD) 2015, pp.85-91 |
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Conference
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2006 |
Low Jitter 1.56GHz PLL Clock Generator for 3.125Gb/s/ch CMOS Serial Link Transceiver
Byun Sangjin International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) 2006, pp.75-768 |
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Journal
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2005 |
A four-channel 3.125-Gb/s/ch CMOS serial-link transceiver with a mixed-mode adaptive equalizer
김진욱 IEEE Journal of Solid-State Circuits, v.40, no.2, pp.462-471 |
30 |
원문
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