BROWSE
Researchers
Detail
Han Kyuseung
- Department
- AI Edge SoC Research Section
- Contact
| Type | Year | Title | Cited | Download |
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Journal
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2024 | AESware: Developing AES-enabled low-power multicore processors leveraging open RISC-V cores with a shared lightweight AES accelerator Eunjin Choi ENGINEERING SCIENCE AND TECHNOLOGY-AN INTERNATIONAL JOURNAL-JESTECH, v.60, pp.1-10 | 0 | |
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Journal
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2024 | SNN eXpress: Streamlining Low‐Power AI‐SoC Development With Unsigned Weight Accumulation Spiking Neural Network Hyeonguk Jang ETRI Journal, v.46, no.5, pp.829-838 | 1 | |
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Journal
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2024 | Designing Low-Power RISC-V Multicore Processors With a Shared Lightweight Floating Point Unit for IoT Endnodes Jina Park, Kyuseung Han IEEE Transactions on Circuits and Systems I: Regular Papers, v.71, no.9, pp.4106-4119 | 3 | |
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Conference
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2024 | STARC: Crafting Low-Power Mixed-Signal Neuromorphic Processors by Bridging SNN Frameworks and Analog Designs Kyuseung Han, Hyunseok Kwak International Symposium on Low Power Electronics and Design (ISLPED) 2024, pp.1-6 | 1 | |
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Journal
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2024 | Day–Night architecture: Development of an ultra-low power RISC-V processor for wearable anomaly detection Eunjin Choi, Jina Park, Kyeongwon Lee Journal of Systems Architecture, v.152, pp.1-11 | 6 | |
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Conference
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2024 | Optimizing Implementation of SNN for Embedded System Hyeonguk Jang International Conference on Advanced Communications Technology (ICACT) 2024, pp.104-106 | 0 | |
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Conference
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2023 | Florian: Developing a Low-power RISC-V Multicore Processor with a Shared Lightweight FPU Jina Park, Kyuseung Han International Symposium on Low Power Electronics and Design (ISLPED) 2023, pp.1-6 | 4 | |
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Conference
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2023 | Developing an Ultra-low Power RISC-V Processor for Anomaly Detection Jina Park Design, Automation & Test in Europe Conference (DATE) 2023, pp.1-2 | 2 | |
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Conference
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2022 | Releasing the Memory Bottleneck to Display Video Correctly Hyeonguk Jang International SoC Design Conference (ISOCC) 2022, pp.340-341 | 0 | |
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Conference
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2021 | K-means Clustering-specific Lightweight RISC-V processor Wooyoung Lee International SoC Design Conference (ISOCC) 2021, pp.391-392 | 1 | |
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Journal
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2021 | Developing a Multicore Platform Utilizing Open RISC-V Cores Hyeonguk Jang, Kyuseung Han IEEE Access, v.9, pp.120010-120023 | 9 | |
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Conference
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2021 | Ultra-low Power Design for RISC-V Edge SoC 이재진 대한전자공학회 학술 대회 (하계) 2021, pp.2280-2281 | ||
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Journal
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2021 | Developing TEI-Aware Ultralow-Power SoC Platforms for IoT End Nodes Kyuseung Han IEEE Internet of Things Journal, v.8, no.6, pp.4642-4656 | 20 | |
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Conference
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2019 | Supporting Serial Interfaces on Virtual SoC Platforms to Develop Sensor Applications Hyeonguk Jang International SoC Design Conference (ISOCC) 2019, pp.101-102 | ||
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Journal
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2019 | TEI-ULP: Exploiting Body Biasing to Improve the TEI-Aware Ultralow Power Methods Woojoo Lee IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v.38, no.9, pp.1758-1770 | 10 | |
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Conference
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2019 | TIP: A Temperature Effect Inversion-Aware Ultra-Low Power System-on-Chip Platform Kyuseung Han International Symposium on Low Power Electronics and Design (ISLPED) 2019, pp.1-6 | 13 | |
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Journal
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2019 | MMNoC: Embedding Memory Management Units into Network-on-Chip for Lightweight Embedded Systems Hyeonguk Jang IEEE Access, v.7, pp.80011-80019 | 9 | |
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Journal
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2019 | A Diagnosable Network-on-Chip for FPGA Verification of Intellectual Properties Kyuseung Han IEEE Design & Test, v.36, no.2, pp.81-87 | 4 | |
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Journal
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2018 | TEI-NoC: Optimizing Ultralow Power NoCs Exploiting the Temperature Effect Inversion Kyuseung Han IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v.37, no.2, pp.458-471 | 21 | |
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Journal
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2017 | Converting Interfaces on Application-specific Network-on-chip Kyuseung Han Journal of Semiconductor Technology and Science, v.17, no.4, pp.505-513 | 6 | |
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Conference
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2017 | Introduction and Utilization of Application-Specific NoC 한규승 대한전자공학회 종합 학술 대회 (하계) 2017, pp.1542-1543 | ||
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Journal
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2017 | TEI-power Woojoo Lee ACM Transactions on Design Automation of Electronic Systems, v.22, no.3, pp.1-25 | 14 |