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Journal
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2024 |
Designing Low-Power RISC-V Multicore Processors With a Shared Lightweight Floating Point Unit for IoT Endnodes
Han Kyuseung IEEE Transactions on Circuits and Systems I: Regular Papers, v.71, no.9, pp.4106-4119 |
4 |
원문
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Journal
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2024 |
Designing Low-Power RISC-V Multicore Processors With a Shared Lightweight Floating Point Unit for IoT Endnodes
박진아 IEEE Transactions on Circuits and Systems I: Regular Papers, v.71, no.9, pp.4106-4119 |
4 |
원문
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Journal
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2021 |
Developing a Multicore Platform Utilizing Open RISC-V Cores
Hyeonguk Jang IEEE Access, v.9, pp.120010-120023 |
14 |
원문
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Journal
|
2021 |
Developing a Multicore Platform Utilizing Open RISC-V Cores
Han Kyuseung IEEE Access, v.9, pp.120010-120023 |
14 |
원문
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Journal
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2018 |
Efficient Parallel Join Processing Exploiting SIMD in Multi-Thread Environments
홍길석 IEICE Transactions on Information and Systems, v.E101-D, no.3, pp.659-667 |
3 |
원문
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Conference
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2017 |
Implementation of an Asynchronous Micro-Controller on the Commercial FPGA
Zi Ho Shin International Conference on Advanced Computer Theory and Engineering (ICACTE) 2017, pp.1-7 |
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Journal
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2015 |
Flexible Multi-Core Platform for a Multiple-Format Video Decoder
조현호 Journal of Signal Processing Systems, v.80, no.2, pp.163-179 |
3 |
원문
|
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Conference
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2014 |
Software radio on smartphones
박용태 Workshop on Mobile Computing Systems and Applications (HotMobile) 2014, pp.1-6 |
5 |
원문
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Journal
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2012 |
Multicore Flow Processor with Wire-Speed Flow Admission Control
Doo Kyeong Hwan ETRI Journal, v.34, no.6, pp.827-837 |
5 |
원문
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Conference
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2012 |
ASIP for Multi-Standard Video Decoding
Jae-Jin Lee International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS) 2012, pp.37-42 |
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Conference
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2012 |
Analysis of an Asynchronous RISC Processor Based on EISC Instruction Set Architecture
Oh Myeong-Hoon International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) 2012, pp.1-3 |
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Journal
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2011 |
A Multi-Band OFDM Ultra-Wideband SoC in 90 nm CMOS Technology
김도훈 IEEE Transactions on Consumer Electronics, v.57, no.3, pp.1064-1070 |
6 |
원문
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Journal
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2010 |
Application-Adaptive Reconfiguration of Memory Address Shuffler for FPGA-Embedded Instruction-Set Processor
Kwon Young-Su Journal of Circuits, Systems and Computers, v.19, no.7, pp.1435-1447 |
0 |
원문
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Journal
|
2009 |
A Novel Instruction Set for Packet Processing of Network ASIP
정원영 한국통신학회논문지 B : 네트워크 및 서비스, v.34, no.9, pp.939-946 |
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Conference
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2008 |
Application-Adaptive Reconfiguration of Memory Address Shuffler for FPGA-Embedded Instruction-Set Processor
Kwon Young-Su International Conference on Field Programmable Logic and Applications (FPL) 2008, pp.209-214 |
0 |
원문
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Journal
|
2008 |
Executable Code Recognition in Network Flows Using Instruction Transition Probabilities
Kim Ik Kyun IEICE Transactions on Information and Systems, v.E91-D, no.7, pp.2076-2078 |
2 |
원문
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