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Conference
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2020 |
Investigation on the Effect of Mental Workload on the Time-related Take-over Performance
Jungsook Kim International Conference on Information and Communication Technology Convergence (ICTC) 2020, pp.1912-1917 |
5 |
원문
|
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Journal
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2018 |
84% High Efficiency Dynamic Voltage Scaler with Nano-Second Settling Time based on Charge-Pump and BWC-DAC
A.N. Ragheb Microelectronics Journal, v.79, pp.919-97 |
1 |
원문
|
|
Conference
|
2014 |
A 230ns settling time type-I PLL with 0.96mW TDC power and simple T<inf>V</inf> calculation algorithm
Lee Ja Yol International Midwest Symposium on Circuits and Systems (MWSCAS) 2014, pp.370-373 |
1 |
원문
|
|
Journal
|
2012 |
Label-Free and Real-Time Immunodetection of the Avian Influenza A Hemagglutinin Peptide Using a Silicon Field-Effect Transistor Fabricated by a Nickel Self-Aligned Silicide Process
Hong Hyo Bong Materials Transactions, v.53, no.9, pp.1633-1637 |
16 |
원문
|
|
Journal
|
2012 |
A 4-GHz All Digital PLL with Low-Power TDC and Phase-Error Compensation
Lee Ja Yol IEEE Transactions on Circuits and Systems I : Regular Papers, v.59, no.8, pp.1706-1719 |
29 |
원문
|
|
Conference
|
2010 |
A 9.15mW 0.22mm<sup>2</sup> 10b 204MS/s pipelined SAR ADC in 65nm CMOS
Young-Deuk Jeon Custom Integrated Circuits Conference (CICC) 2010, pp.1-4 |
41 |
원문
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