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Conference
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2025 |
Perceptual Audio Coding: A 40-Year Historical Perspective
Jurgen Herre International Conference on Acoustics, Speech and Signal Processing (ICASSP) 2025, pp.1-5 |
0 |
원문
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Conference
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2014 |
A 230ns settling time type-I PLL with 0.96mW TDC power and simple T<inf>V</inf> calculation algorithm
Lee Ja Yol International Midwest Symposium on Circuits and Systems (MWSCAS) 2014, pp.370-373 |
1 |
원문
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Journal
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2013 |
Field Trials and Evaluations of In-Band Digital Radio Technologies: HD Radio and DRM+
Baek Myung-Sun IEEE Transactions on Broadcasting, v.59, no.3, pp.401-411 |
4 |
원문
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Journal
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2012 |
A 4-GHz All Digital PLL with Low-Power TDC and Phase-Error Compensation
Lee Ja Yol IEEE Transactions on Circuits and Systems I : Regular Papers, v.59, no.8, pp.1706-1719 |
29 |
원문
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Conference
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2011 |
A 4-GHz all digital fractional-N PLL with low-power TDC and big phase-error compensation
Lee Ja Yol Custom Integrated Circuits Conference (CICC) 2011, pp.1-4 |
6 |
원문
|
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Conference
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2011 |
A 4-GHz Low-power TDC-based All Digital PLL having 9.6mW and 1.2ps rms jitter
Lee Ja Yol International Microwave Workshop Series on Intelligent Radio for Future Personal Terminals (IMWS-IRFPT) 2011, pp.1-2 |
1 |
원문
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Journal
|
2011 |
Low power digital PLL based TDC using low rate clocks
Park Mijeong Electronics Letters, v.47, no.14, pp.793-794 |
1 |
원문
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