Subjects : Processing architecture
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Conference | 2016 | A Low Power Visual Processing Architecture for Energy Efficiency on Embedded Devices Bumho Kim IEMEK Symposium on Embedded Technology (ISET) 2016, pp.158-159 | ||
| Conference | 2015 | The Study on Large Scale Image Processing Architecture Based on Hadoop2.0 Clusters Oh Bong Jin International Conference on Consumer Electronics (ICCE) 2015 : Berlin, pp.474-475 | 1 | 원문 |
| Conference | 2014 | A FPGA based Real-Time Post-Processing Architecture for Active Stereo Vision Choi Seung Min International Symposium on Consumer Electronics (ISCE) 2014, pp.1-2 | 1 | 원문 |
| Journal | 2011 | A Multi-Band OFDM Ultra-Wideband SoC in 90 nm CMOS Technology 김도훈 IEEE Transactions on Consumer Electronics, v.57, no.3, pp.1064-1070 | 6 | 원문 |
| Conference | 2009 | A 24-Parallel Processing DS-UWB System Kang Kyu-Min International Symposium on Consumer Electronics (ISCE) 2009, pp.554-557 | 1 | 원문 |
| Conference | 2007 | Packet Processing Architecture in a Wireless Multimedia Device Lee Seok-Jin International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) 2007, pp.705-706 |
| Status | Year | Patent Name | Country | Family Pat. | KIPRIS |
|---|---|---|---|---|---|
| Registered | 2010 | VECTOR PROCESSING APPARATUS AND METHOD | UNITED STATES |
| Type | Year | Research Project | Primary Investigator | Download |
|---|---|---|---|---|
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