11ZS1100, Development of Embedded System for Intelligent Vehicle,
Hwang Seung Ku
Abstract
III. 연구내용 및 범위 본 연구개발은 2007 년 1 월 전문연구사업으로서 시작되어 2012 년 12 월까지 총 6 년의 개발 일정으로 추진되고 있으며, 2010 년에는 대과제인 ‘융복합부품 핵심기술 연구’ 대과제의 제 3 세부과제로 편입되어 연구개발이 이루어졌다. 2011 년도는 본 사업의 제 5 차년도 개발 일정으로서, 지난 4 년간의 연구개발 성과를 기반으로 하여 다음과 같은 세부 연구내용 및 범위를 목표로 설정하였다. ● 32 비트 저전력 비동기식 프로세서 코어 성능 개선 - 프로세서 코어 기능 확장 설계 및 구현 - 비동기식 프로세서 코어 성능 개선 - 비동기식 프로세서 성능 검증 환경 구축 ● 외부 인터페이스 통합 설계 - 비동기식 외부 버스 인터페이스 통합 설계 ● 비동기식 회로 설계를 위한 요소기술 연구 - 동기-비동기식 접속장치 기술 연구 - 비동기식 회로의 FPGA Prototyping 기술 연구 - 비동기식 회로 합성 기술 분석 2011 년도 본 과제의 세부 성과목표 및 성과지표는 다음과 같이 정의하였다.
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