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Conference
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2014 |
A 230ns settling time type-I PLL with 0.96mW TDC power and simple T<inf>V</inf> calculation algorithm
Lee Ja Yol International Midwest Symposium on Circuits and Systems (MWSCAS) 2014, pp.370-373 |
1 |
원문
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Journal
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2011 |
Low power digital PLL based TDC using low rate clocks
Park Mijeong Electronics Letters, v.47, no.14, pp.793-794 |
1 |
원문
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Journal
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2010 |
Design and Implementation of a Latency Efficient Encoder for LTE Systems
Hwang Soo Yun ETRI Journal, v.32, no.4, pp.493-502 |
7 |
원문
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Conference
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2010 |
Implementation of an Encoder based on Parallel Structure for LTE Systems
Hwang Soo Yun Wireless Communications and Networking Conference (WCNC) 2010, pp.1-6 |
4 |
원문
|
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Conference
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2008 |
An Implementation of GSG with Parallel Outputs Targeting MIMO Detector
Soo Yun Hwang Vehicular Technology Conference (VTC) 2008 (Fall), pp.1-5 |
0 |
원문
|
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Conference
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2008 |
An Improved Implementation Method of The Gold Sequence Generator
Soo Yun Hwang International Symposium on Consumer Electronics (ISCE) 2008, pp.1-4 |
8 |
원문
|
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Conference
|
2007 |
An Implementation and Performance Analysis of Slave-Side Arbitration Schemes for the ML-AHB BusMatrix
Soo Yun Hwang Symposium on Applied Computing (SAC) 2007, pp.1545-1551 |
1 |
원문
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