Subjects :
Time-to-digital
논문 검색결과
| Type |
Year |
Title |
Cited |
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Journal
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2016 |
A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC
김신웅 IEEE Journal of Solid-State Circuits, v.51, no.2, pp.391-400 |
27 |
원문
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Journal
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2012 |
A Time-to-Digital Converter Based on a Multiphase Reference Clock and a Binary Counter With a Novel Sampling Error Corrector
최광천 IEEE Transactions on Circuits and Systems II : Express Briefs, v.59, no.3, pp.143-147 |
32 |
원문
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Journal
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2011 |
Low power digital PLL based TDC using low rate clocks
Park Mijeong Electronics Letters, v.47, no.14, pp.793-794 |
1 |
원문
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Conference
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2007 |
A Bidirectional Readout Integrated Circuit (ROIC) with Capacitance-to-Time Conversion Operation for High Performance Capacitive MEMS Accelerometers
Sungsik Lee SENSORS 2007, pp.288-291 |
7 |
원문
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연구보고서 검색결과
| Type |
Year |
Research Project |
Primary Investigator |
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