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Kim Ju-Yeob
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PIM AI SoC Research Section
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논문 검색결과
Type Year Title Cited Download
Conference
2024 A Low-Power HBM3 Memory Interface   김이경   대한전자공학회 학술 대회 (하계) 2024, pp.3378-3379
Conference
2023 Chiplet Heterogeneous-Integration AI Processor   Youngsu Kwon   International Conference on Electronics, Information and Communication (ICEIC) 2023, pp.1-2 3
Conference
2022 ArtBrain-K: 4.8PetaFLOPS, 0.514TFLOPS/W AI Server System   한진호   반도체공학회 학술 대회 (하계) 2022, pp.7-8
Conference
2022 M3FPU: Multiformat Matrix Multiplication FPU Architectures for Neural Network Computations   Won Jeon   International Conference on Artificial Intelligence Circuits and Systems (AICAS) 2022, pp.150-153 1
Conference
2021 HPC LINPACK Parameter Optimization on Homo-/Heterogeneous System of ARM Neoverse N1SDP   Je-Seok Ham   International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia) 2021, pp.139-143 0
Conference
2020 Performance Evaluation and Analysis of HPC LINPACK Benchmark on Homo-/Heterogeneous System of ARM Neoverse N1SDP   함제석   한국소프트웨어 종합 학술 대회 2020, pp.10-12
Conference
2019 Memory controller design of Visual Intelligence Chip with variable clock delay control   김병조   대한전자공학회 학술 대회 (추계) 2019, pp.190-192
Conference
2018 Memory controller structure and design of Visual Intelligence Chip   김병조   대한전자공학회 학술 대회 (추계) 2018, pp.171-174
Conference
2017 Data Compression Hardware of the ReLu Output in Convolution Neural Network   Juyeob Kim   International Conference on Future Generation Communication and Networking (FGCN) 2017 (ASTL 146), pp.1-7
Conference
2016 Hierarchical compression of Deep Convolutional Neural Networks on large Scale Visual Recognition for Mobile Application   Byungjo Kim   International Mega-Conference on Green and Smart Technology (GST) 2016, pp.189-194
Conference
2016 An Efficient Pruning and Weight Sharing Method for Neural Network   Jin-Kyu Kim   International Conference on Consumer Electronics (ICCE) 2016 : Asia, pp.472-473 9
Conference
2016 Hardware Design Exploration of Fully-Connected Deep Neural Network with Binary Parameters   Jinkyu Kim   International SoC Design Conference (ISOCC) 2016, pp.312-313 2
Conference
2016 A Mixed-radix Pipeline FFT Processor with Trivial Multiplication for LTE Uplink   Jinkyu Kim   International Symposium on Consumer Electronics (ISCE) 2016, pp.57-58 4
Conference
2016 Analysis of Deep Learning Framework for Visual Perception   이미영   대한전자공학회 종합 학술 대회 (하계) 2016, pp.1808-1811
Conference
2015 The Hardware Accelerator of The Automatic Speech Recognition for The Continuous Korean Words   Juyeob Kim   International SoC Design Conference (ISOCC) 2015, pp.1-2
Conference
2015 A Fully-Hardwired Implementation of Large Vocabulary Continuous Speech Recognizer   Yunjoo Kim   International Symposium on Consumer Electronics (ISCE) 2015, pp.1-2 0
Journal
2014 뉴로시냅틱 인지 컴퓨팅 기술 동향   장준영   주간기술동향, pp.1-13
Conference
2011 The Discrete Fourier Transform Design of The LTE Uplink Specification   Ju Yeob Kim   International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) 2011, pp.1-4
Conference
2008 Performance analysis of NoC structure based on Star-Mesh Topology   Ju Yeob Kim   International SoC Design Conference (ISOCC) 2008, pp.II162-II165 5
Conference
2008 Star-Mesh NoC based Multi-channel H.264 Decoder Design   June-Young Chang   International SoC Design Conference (ISOCC) 2008, pp.II170-II173 2