ETRI-Knowledge Sharing Plaform

Negative Resistance Real-Time Application Face Detection Virtual Platform Class B Xilinx Virtex Cmos Process Fpga Implementation Phase Noise Ict Convergence Face Recognition System Channel Estimation(CE) Continuous Wave Radar Eye Detection Estimation Technique Frequency Tuning Range Fractional-N Pll Internal Loads Illumination Invariant Low-Complexity Packet Error Rate Oscillator Circuit Spectrum Leasing Secondary User(Su) Secondary Link Charge Pump High-Precision Haar-Like Features High Signal-To-Noise Ratio Loop Bandwidth Physical Layer Security(Physec) Quality Of Service(QoS) 3gpp Lte Systems Error Rate Performance Hardware Model High-Resolution Heterogeneous Feature Transmission Strategy Lc Tank Mimo Detection Multiple Input Multiple Output(MIMO) Optimal Transmission Output Power Rms Error Sub-Mmwave Channel State Information(CSI) Discrete Cosine Transform Hardware And Software Integrity Verification Modulation Bandwidth Radar Sensing Self-Quotient Image Cascaded Classifier Experimental Result Feature Extraction 40nm Cmos Linear Discriminant Analysis(LDA) Ka-Band Radar Signal Processing Signal Noise Ratio(SNR) Code Generator Development Environment Differential Vco External And Internal Hardware System Fmcw Radar Illumination Effect Wide Frequency 65nm Cmos Application Software Ergodic Rate High Reliability Imperfect Csit Locking Range Operating System Push-Pull Primary Users(PUs) Qos Level Pll Synthesizer Qr Decomposition Radar Applications Computational Complexity Colpitts Oscillator Detection Techniques Detection Algorithm High Speed Hw-Sw Codesign Hardware Implementation Transmit Beamforming Transaction Level Model 5 Ghz Lte Downlink M-Algorithm Quasi-Ml Secrecy Rate Verification Module Wide Tuning