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Conference
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2024 |
Ethernet-Based Memory Expansion with Cache-coherent Architecture for Disaggregated Memory Systems
Sok Song-Woo International Conference on Big Data (Big Data) 2024, pp.8780-8782 |
0 |
원문
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Journal
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2024 |
AESware: Developing AES-enabled low-power multicore processors leveraging open RISC-V cores with a shared lightweight AES accelerator
최은진 ENGINEERING SCIENCE AND TECHNOLOGY-AN INTERNATIONAL JOURNAL-JESTECH, v.60, pp.1-10 |
1 |
원문
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Journal
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2024 |
Designing Low-Power RISC-V Multicore Processors With a Shared Lightweight Floating Point Unit for IoT Endnodes
Han Kyuseung IEEE Transactions on Circuits and Systems I: Regular Papers, v.71, no.9, pp.4106-4119 |
4 |
원문
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Journal
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2024 |
Designing Low-Power RISC-V Multicore Processors With a Shared Lightweight Floating Point Unit for IoT Endnodes
박진아 IEEE Transactions on Circuits and Systems I: Regular Papers, v.71, no.9, pp.4106-4119 |
4 |
원문
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Journal
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2024 |
Day–Night architecture: Development of an ultra-low power RISC-V processor for wearable anomaly detection
박진아 Journal of Systems Architecture, v.152, pp.1-11 |
6 |
원문
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Journal
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2024 |
Day–Night architecture: Development of an ultra-low power RISC-V processor for wearable anomaly detection
최은진 Journal of Systems Architecture, v.152, pp.1-11 |
6 |
원문
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Journal
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2024 |
Day–Night architecture: Development of an ultra-low power RISC-V processor for wearable anomaly detection
이경원 Journal of Systems Architecture, v.152, pp.1-11 |
6 |
원문
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Conference
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2024 |
OmniXtend Host System for Remote Memory Access and Expanding
Kwon Hyuk Je 대한전자공학회 학술 대회 (하계) 2024, pp.2680-2683 |
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Conference
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2024 |
Performance Modeling and Analysis Using Roofline Model for OmniXtend Based RISC-V System
Kim Young Woo 대한전자공학회 학술 대회 (하계) 2024, pp.2595-2598 |
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Conference
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2023 |
A device driver for the AB21 SoC in Supreme-K system
Kim Young Ho International Conference on Information and Communication Technology Convergence (ICTC) 2023, pp.1781-1784 |
0 |
원문
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Conference
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2023 |
Florian: Developing a Low-power RISC-V Multicore Processor with a Shared Lightweight FPU
박진아 International Symposium on Low Power Electronics and Design (ISLPED) 2023, pp.1-6 |
4 |
원문
|
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Conference
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2023 |
Florian: Developing a Low-power RISC-V Multicore Processor with a Shared Lightweight FPU
Han Kyuseung International Symposium on Low Power Electronics and Design (ISLPED) 2023, pp.1-6 |
4 |
원문
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Journal
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2023 |
Tensor slicing and optimization for multicore NPUs
Rafael Sousa Journal of Parallel and Distributed Computing, v.175, pp.66-79 |
5 |
원문
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Conference
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2023 |
Developing an Ultra-low Power RISC-V Processor for Anomaly Detection
박진아 Design, Automation & Test in Europe Conference (DATE) 2023, pp.1-2 |
2 |
원문
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Conference
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2021 |
K-means Clustering-specific Lightweight RISC-V processor
이우영 International SoC Design Conference (ISOCC) 2021, pp.391-392 |
2 |
원문
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Journal
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2021 |
Developing a Multicore Platform Utilizing Open RISC-V Cores
Hyeonguk Jang IEEE Access, v.9, pp.120010-120023 |
14 |
원문
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Journal
|
2021 |
Developing a Multicore Platform Utilizing Open RISC-V Cores
Han Kyuseung IEEE Access, v.9, pp.120010-120023 |
14 |
원문
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Conference
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2021 |
Ultra-low Power Design for RISC-V Edge SoC
Jae-Jin Lee 대한전자공학회 학술 대회 (하계) 2021, pp.2280-2281 |
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Journal
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2021 |
Developing TEI-Aware Ultralow-Power SoC Platforms for IoT End Nodes
Han Kyuseung IEEE Internet of Things Journal, v.8, no.6, pp.4642-4656 |
21 |
원문
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Journal
|
2019 |
MMNoC: Embedding Memory Management Units into Network-on-Chip for Lightweight Embedded Systems
Hyeong Uk Jang IEEE Access, v.7, pp.80011-80019 |
9 |
원문
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