ETRI-Knowledge Sharing Plaform

Stereo Images Field-Programmable Gate Array(FPGA) Stereo Vision System Technology Policy Hole Filling Active Stereo Vision Weighted Median Filter Very Large-Scale Integration(VLSI) Hybrid Stereo Vision Joint Bilateral Filter Real-World Error Rate Sub-Blocks(SB) Real-Time Processing Embedded System Image Set Bilateral Filtering Integration Architecture Power Consumption Passive Stereo Vision Real-Time Face Detection Combined Input Asic Implementation Dynamic Programming Window System Matching System Quadruped Robots Stereo Matching Algorithms Tele-Operation Hand Motion Techno-Economic Analysis High-Quality Approximate Algorithms Mobile Robots Post-Processing Algorithm De Bruijn Sequence Structured Light Mpeg-4 Video Compressed Images Face Tracking Indoor Environment Upper Body Low Power Pre-Processing Repetitive Patterns Xilinx Virtex Reduction Of Noise Depth Map Maximum Speed Processing Architecture Pose Detection Simulation Results Illumination Change Calculation Method Gesture Recognition Consistency Checking Cost Calculation Over-Current Vision Information IEEE 802.15.4 Active And Passive Disparity Map MPEG-2 Performance Evaluation Three Dimensional(3D) Camera Image Digital Network Novel Design Artificial Images Absolute Difference Census Transform Depth Information Frames Per Second(FPS) Pyramid Image Frontal Face Integrated Services(IntServ) Cost Aggregation Matching Method Detecting Accuracy Hardware Architecture Traditional Methods Soft-Decision Application Specific Integrated Circuit Human Following Image Data Adaboost Algorithm