Subject

Subjects : Reference clock

  • Articles (10)
  • Patents (3)
  • R&D Reports (0)
논문 검색결과
Type Year Title Cited Download
Conference 2014 A 230ns settling time type-I PLL with 0.96mW TDC power and simple T<inf>V</inf> calculation algorithm   Lee Ja Yol  International Midwest Symposium on Circuits and Systems (MWSCAS) 2014, pp.370-373 1 원문
Journal 2012 A Time-to-Digital Converter Based on a Multiphase Reference Clock and a Binary Counter With a Novel Sampling Error Corrector   최광천  IEEE Transactions on Circuits and Systems II : Express Briefs, v.59, no.3, pp.143-147 32 원문
Conference 2011 A 4-GHz all digital fractional-N PLL with low-power TDC and big phase-error compensation   Lee Ja Yol  Custom Integrated Circuits Conference (CICC) 2011, pp.1-4 6 원문
Conference 2011 A 4-GHz Low-power TDC-based All Digital PLL having 9.6mW and 1.2ps rms jitter   Lee Ja Yol  International Microwave Workshop Series on Intelligent Radio for Future Personal Terminals (IMWS-IRFPT) 2011, pp.1-2 1 원문
Journal 2011 Low power digital PLL based TDC using low rate clocks   Park Mijeong  Electronics Letters, v.47, no.14, pp.793-794 1 원문
Conference 2011 Design of Novel Distributed Translator for Synchronized Multiple Transmission Networks of ATSC 8-VSB System   Heung Mook Kim  International Symposium on Broadband Multimedia Systems and Broadcasting (BMSB) 2011, pp.1-3 0 원문
Conference 2009 Frequency Synchronization among Translators for DTV Broadcasting Network   Eum Ho Min  Broadcast Symposium (BTS) 2009, pp.1-3
Conference 2009 Precision Time Synchronization using IEEE 1588 for Wireless Sensor Networks   조현태  International Conference on Computational Science and Engineering (CSE) 2009, pp.579-586 49 원문
Conference 2006 Fast Settling 9GHz PLL Using 528MHz Reference PLL Clock for MB-OFDM UWB System   Lee. Young-Jae  European Microwave Integrated Circuits Conference (EuMIC) 2006, pp.179-182 0 원문
Conference 2006 A 1 .25-Gb/s Digitally-Controlled Dual-Loop Clock and Data Recovery Circuit with Enhanced Phase Resolution   성창경  International Symposium on Circuits and Systems (ISCAS) 2006, pp.2113-2116 3
특허 검색결과
Status Year Patent Name Country Family Pat. KIPRIS
Registered 2017 PULSE RADAR DEVICE AND OPERATING METHOD THEREOF UNITED STATES
Registered 2013 DIGITAL PHASE-LOCKED LOOP UNITED STATES
Registered 2014 PULSE RADAR APPARATUS UNITED STATES
연구보고서 검색결과
Type Year Research Project Primary Investigator Download
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