Subject

Subjects : specific on-resistance

  • Articles (14)
  • Patents (0)
  • R&D Reports (0)
논문 검색결과
Type Year Title Cited Download
Journal 2024 β-Ga2O3 Schottky Barrier Diodes with Near-Zero Turn-on Voltage and Breakdown Voltage over 3.6 kV   Kyu Jun Cho  Transactions on Electrical and Electronic Materials, v.25, no.3, pp.1-5 4 원문
Conference 2024 High breakdown voltage, low specific on-resistance GaN on GaN PiN diodes with low contact resistance on p-type GaN for high power applications   Kim Donghan  Materials Research Society (MRS) Meeting 2024 (Spring), pp.1-2
Conference 2016 Analysis of High-Density Trench Gate MOSFET using SIde-wall Spacer Technology   Kim Sang Gi  International Conference on Electronics, Information and Communication (ICEIC) 2016, pp.751-752
Conference 2016 BCD Technology with an integrated Trench Gate MOSFET for Smart Power IC   Won Jong Il  International Conference on Electronics, Information and Communication (ICEIC) 2016, pp.745-746
Journal 2015 Power Trench Gate MOSFET with an Integrated 6-Pack Configuration for a 3-Phase Inverter   Won Jong Il  Journal of the Korean Physical Society, v.67, no.7, pp.1214-1221 2 원문
Journal 2013 Electrical Characteristics of Triple-Gate RSO Power MOSFET (TGRMOS) with Various Gate Configurations and Bias Conditions   Na Kyoung Il  ETRI Journal, v.35, no.3, pp.425-430 4 원문
Conference 2013 Effects of Various Field Plates for Normally-Off GaN MISFETs   Woojin Chang  International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) 2013, pp.332-333
Conference 2013 Simulation Studies of Triple Gate Trench Power MOSFETs (TGRMOSs) by Using Modified Resurf Stepped Oxide (RSO) Process with Various Gate Configuration and its Bias Condition   Na Kyoung Il  한국 반도체 학술 대회 (KCS) 2013, pp.1-2
Journal 2012 Simulation and Fabrication Studies of Semi-SuperJunction Trench Power MOSFETs by RSO Process with Silicon Nitride Layer   Na Kyoung Il  ETRI Journal, v.34, no.6, pp.962-965 16 원문
Journal 2010 High-Density Nano-Scale N-Channel Trench-Gated MOSFETs Using the Self-Aligned Technique   Kim Sang Gi  Journal of the Korean Physical Society, v.57, no.4, pp.802-805 3 원문
Journal 2004 High-density Trench Gate DMOSFETs with Trench Contact Structure   Kim Jongdae  Electronics Letters, v.40, no.11, pp.699-700 5 원문
Journal 2004 A New Structure of SOI LDMOSFET Structure with a Trench in the Drift Region for a PDP Scan Driver IC   손원소  ETRI Journal, v.26, no.1, pp.7-12 6 원문
Journal 2003 A novel technique for fabricating high reliable trench DMOSFETs using self-align technique and hydrogen annealing   Kim Jongdae  IEEE Transactions on Electron Devices, v.50, no.2, pp.378-383 5 원문
Journal 2002 A Novel Process for Fabricating a High Density Trench MOSFETs for DC-DC Converters   Kim Jongdae  ETRI Journal, v.24, no.5, pp.333-340 24 원문
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