Subject

Subjects : phase-locked loop (PLL)

  • Articles (36)
  • Patents (9)
  • R&D Reports (0)
논문 검색결과
Type Year Title Cited Download
Conference 2025 Wide Field-of-view Biaxial FMCW LiDAR with High-speed Detection utilizing a Photoreceiver based on Static Unitary Detector Technique   Munhyun Han  SPIE Sensors + Imaging 2025 (SPIE 13667), pp.1-8 0 원문
Journal 2024 In-situ Measurement of Spectral Linewidth in Wavelength-Modulated Signals for Frequency-modulated Continuous-wave LiDAR Systems   라종필  AIP Advances, v.14, no.8, pp.1-9 0 원문
Journal 2022 Technique for fast triangular chirp modulation in FMCW PLL   최한길  IEICE Electronics Express, v.19, no.14, pp.1-4 2 원문
Conference 2021 An LUT-based Adaptive DPLL for SSV GNSS Receivers   송영진  International Technical Meeting of the Satellite Division of The Institute of Navigation (ION GNSS+) 2021, pp.3360-3367 2 원문
Conference 2018 Power Conditioning System with Seamless Mode Transition for Microgrid Island Operations   Sewan Heo  International Systems Conference (SysCon) 2018, pp.706-711 0 원문
Journal 2018 470-MHz-698-MHz IEEE 802.15.4m Compliant RF CMOS Transceiver   Seo Young Ho  ETRI Journal, v.40, no.2, pp.167-179 2 원문
Journal 2016 Fractional spur reduction technique using 45° phase dithering in phase interpolator based all‐digital phase‐locked loop   고준수  Electronics Letters, v.52, no.23, pp.1920-1922 1 원문
Conference 2016 Single-phase power conditioning system with slew-rate controlled synchronizer for renewable energy system in microgrid   Sewan Heo  International Conference on Renewable Energy Research and Applications (ICRERA) 2016, pp.550-555 2 원문
Conference 2014 Low Power Receiver for Medical Implantable Communication System Using Delay Locked Loop   장희돈  International Microwave Workshop Series on RF and Wireless Technologies for Biomedical and Healthcare Applications (IMWS-Bio) 2014, pp.1-3 1 원문
Journal 2013 Consideration on Offset LO Contribution in the Phase Noise of Offset PLL Architecture   Ryu Joon Gyu  Microwave and Optical Technology Letters, v.55, no.11, pp.2699-2701 1 원문
Conference 2013 An IEEE 802.15.4g SUN FSK RF CMOS Transceiver for Smart Grid and CEs   Lee Seung Sik  International Conference on Consumer Electronics (ICCE) 2013 : Berlin, pp.89-92 2 원문
Journal 2013 A 990-$\mu\hbox{W}$ 1.6-GHz PLL Based on a Novel Supply-Regulated Active-Loop-Filter VCO   최광천  IEEE Transactions on Circuits and Systems II : Express Briefs, v.60, no.6, pp.311-315 17 원문
Journal 2012 Digital Compensator for Large Phase-Error Glitches in Digital PLL   Lee Ja Yol  Electronics Letters, v.48, no.19, pp.1184-1185 0 원문
Journal 2011 Power-Efficient M-Ary PSSK Communications with Uncertain Phase Errors   Dong Kyoo Kim  Wireless Personal Communications, v.60, no.3, pp.419-430 0 원문
Journal 2011 Low power digital PLL based TDC using low rate clocks   Park Mijeong  Electronics Letters, v.47, no.14, pp.793-794 1 원문
Journal 2010 A Design and Fabrication of 120 GHz Local Oscillator   Lee Won Hui  한국인터넷방송통신학회논문지, v.10, no.6, pp.71-76
Journal 2010 Low-Noise Wideband PLL with Dual-Mode Ring-VCO   Lee Hui Dong  Electronics Letters, v.46, no.20, pp.1368-1370 10 원문
Journal 2008 A 28.5–32-GHz Fast Settling Multichannel PLL Synthesizer for 60-GHz WPAN Radio   Lee Ja Yol  IEEE Transactions on Microwave Theory and Techniques, v.56, no.5, pp.1234-1246 35 원문
Journal 2008 A 40 Gb/s Clock and Data Recovery Module with Improved Phase-Locked Loop Circuits   박현  ETRI Journal, v.30, no.2, pp.275-281 0 원문
Conference 2007 Design, Fabrication, and Characterization of a Readout Integrated Circuit (ROIC) for Capacitive MEMS Sensors   Lee Myung Lae  SENSORS 2007, pp.260-263 1 원문
Journal 2007 A 3.1 to 5 GHz CMOS Transceiver for DS-UWB Systems   Park Bong Hyuk  ETRI Journal, v.29, no.4, pp.421-429 12 원문
Conference 2007 Digitally-Controlled UWB Pulse Generator for IEEE 802.1 5.4a Systems   Oh Mi Kyung  International Conference on Consumer Electronics (ICCE) 2007, pp.1-2 5 원문
Conference 2006 Fast Settling 9GHz PLL Using 528MHz Reference PLL Clock for MB-OFDM UWB System   Lee. Young-Jae  European Microwave Integrated Circuits Conference (EuMIC) 2006, pp.179-182 0 원문
Conference 2006 Performance Improvement of a 40 Gb/s PLL Clock Recovery Module Using New Frequency Acquisition and Clock Hold Circuits   박현  IEEE MTT-S International Microwave Symposium Digest 2006, pp.494-497 0 원문
Journal 2006 Implementation of a low‐cost phase‐locked loop clock‐recovery module for 40‐Gb/s optical receivers   우동식  Microwave and Optical Technology Letters, v.48, no.2, pp.312-315 2 원문
Conference 2006 A 40-360 MHz Low-Power CMOS Frequency Synthesizer With Improved Multimodulus Prescaler   Lee Ja Yol  한국반도체 학술 대회 (KCS) 2006, pp.1-2
Journal 2005 Phase Noise Compensation in OFDM Communication System by STFBC Method   이영선  한국전자파학회논문지, v.16, no.10, pp.1043-1049
Journal 2005 A 6.3-9-GHz CMOS fast settling PLL for MB-OFDM UWB applications   Geumyoung Tak  IEEE Journal of Solid-State Circuits, v.40, no.8, pp.1671-1679 87 원문
Conference 2005 Implementation of a Phase-Locked Loop Clock Recovery Module for 40 Gb/s Optical Receivers   박찬호  IEEE MTT-S International Microwave Symposium 2005, pp.2127-2130 4 원문
Journal 2005 An adaptive carrier synchronization technique for robust 8-VSB DTV reception   Lee Yong Tae  IEEE Transactions on Consumer Electronics, v.51, no.1, pp.33-40 7 원문
Conference 2005 An Adaptive Carrier Synchronization Technique for Robust 8-VSB DTV Reception   Lee Yong Tae  International Conference on Consumer Electronics (ICCE) 2005, pp.417-418 1 원문
Conference 2004 Design of the Clock Recovery Circuit with a Phase-Locked Loop for 40 Gb/s Optical Receivers   박찬호  European Microwave Conference (EuMC) 2004, pp.757-759
Conference 2003 An Adaptive Digital Frequency Phase Locked Loop Algorithm for 8-VSB Reception   권순찬  한국통신학회 종합 학술 발표회 (추계) 2003, pp.78-81
Conference 2003 Design & implementation of fast frequency hopping Tx IF module for satellite terminal based on DVB-RCS   Ryu Joon Gyu  Vehicular Technology Conference (VTC) 2003 (Fall), pp.2754-2757 원문
Journal 2003 Clock Recovery from 40 Gbps Optical Signal with Optical Phase-locked Loop based on a Terahertz Optical Asymmetric Demultiplexer   전영민  Optics Communications, v.220, no.4-6, pp.315-319 13 원문
Journal 2001 A 1.8∼3.2-GHz fully differential GaAs MESFET PLL   Taesik Cheung  IEEE Journal of Solid-State Circuits, v.36, no.4, pp.605-610 3 원문
특허 검색결과
Status Year Patent Name Country Family Pat. KIPRIS
Registered 2021 FREQUENCY MODULATION SYSTEM BASED ON PHASE-LOCKED LOOP CAPABLE OF PERFORMING FAST MODULATION INDEPENDENT OF BANDWIDTH AND METHOD OF THE SAME UNITED STATES
Registered 2021 대역폭과 무관한 빠른 변조가 가능한 위상고정루프 기반의 주파수 변조 시스템 및 그 방법 KOREA
Registered 2016 디지털 위상 고정 루프 및 그의 구동방법 KOREA KIPRIS
Registered 2010 LOOP FILTER AND PHASE LOCKED LOOP INCLUDING THE SAME UNITED STATES
Registered 2022 PHASE-LOCKED LOOP CIRCUIT AND OPERATION METHOD THEREOF UNITED STATES
Registered 2015 위상 고정 루프 및 그것의 동작 방법 KOREA KIPRIS
Registered 2021 위상 고정 루프 회로 및 그 동작 방법 KOREA
Registered 2010 PHASE LOCKED LOOP CIRCUIT INCLUDING AUTOMATIC FREQUENCY CONTROL CIRCUIT AND OPERATING METHOD THEREOF UNITED STATES
Registered 2015 프랙셔널 스퍼 잡음을 감소시키기 위한 위상 고정 루프 KOREA KIPRIS
연구보고서 검색결과
Type Year Research Project Primary Investigator Download
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